1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor package and, more particularly, to a method of fabricating a semiconductor package, which forms the semiconductor package as large as a semiconductor chip to reduce its size and make it compact, and attaches all kinds of semiconductor chips, such as a type in which a bond pad is located at the edge of the surface of semiconductor chip or a type in which the bond pad is formed at the center of the surface of semiconductor chip, in an area array form, to form the input/output ports of the semiconductor package, realizing a high-integration and high-performance semiconductor package.
2. Discussion of Related Art
In general, semiconductor packages include a resin sealed package, TCP package, glass sealed package and metal sealed package. These semiconductor packages are divided into an insertion type and surface mount technology (SMT) type according to the packaging method. A typical insertion type includes a dual in-line package (DIP) and pin grid array (PGA), and typical SMT type includes a quad flat package (QFP), plastic leaded chip carrier (PLCC), ceramic leaded chip carrier (CLCC) and ball grid array (BGA). As electronic products become compact, the SMT-type semiconductor package rather than the insertion type is being widely used in order to increase the packing density of components of a print circuit board.
Conventional QFP and BGA are explained below with reference to FIGS. 1 and 2. FIG. 1 shows a structure of a conventional QFP, constructed of a semiconductor chip 1 in which electronic circuits are integrated, a mounting board 8a to which semiconductor chip 1 is attached by an epoxy 3, a plurality of leads 8 externally transmitting a signal of semiconductor chip 1, a wire 4 connecting semiconductor chip 1 to leads 8, and sealant 5 covering semiconductor chip 1 and other peripheral components to protect them from external oxidation and corrosion. With this QFP, a signal output from semiconductor chip 1 is transmitted to leads 8 through wire 4, to be sent to a peripheral circuit through a mother board connected to leads 8. A signal generated by the peripheral circuit is transmitted to semiconductor chip 1 through a path opposite to the above one. However, as the performance of the semiconductor chip is improved, the number of pins of the QFP increases but the distance between the pins is technically difficult to reduce below a specific size. Thus, allowing the QFP to hold a lot of pins enlarges the package.
To overcome this problem, the BGA package has been proposed, which employs a solder ball fused on one side of semiconductor package as its input/output means. Accordingly, the BGA package can process input/output signals larger than those processed by the QFP and it is fabricated smaller than the QFP. Referring to FIG. 2, the BGA is constructed of a circuit board 2 on which a circuit pattern 2a is formed and a solder mask 2b is coated to protect circuit pattern 2a, a semiconductor chip 1 which includes electronic circuits integrated therein and is attached to the center of the surface of circuit board 2, a wire 4 connecting semiconductor chip 1 to circuit pattern 2a of circuit board 2, to transmit signals, a solder ball 6 fused on circuit pattern 2a of circuit board 2 to externally transmit signals, and a sealant 5 covering semiconductor chip 1 and other peripheral components to protect them from external oxidation and corrosion.
With the BGA constructed as above, a signal output from semiconductor chip 1 is transmitted to circuit pattern 2a through wire 4, and then sent to a mother board through solder ball 6 fused to circuit pattern 2a, to be supplied to a peripheral circuit. A signal generated by the peripheral circuit is transmitted to semiconductor chip 1 through a path opposite to the above one. However, because the BGA package is larger than the semiconductor chip included therein by several times, there is a limit to reduce the size of electronic products employing the package. Furthermore, the circuit board of the BGA package is expensive, increasing the cost of the products. Moreover, moisture may permeate the package through the circuit board, creating cracks.
Accordingly, the present invention is directed to a method of fabricating a semiconductor package that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a method of fabricating a semiconductor package, which realizes a small-size semiconductor package without performance deterioration, to meet a tendency to miniaturization of electronic products in which semiconductor packages are mounted, such as communication apparatus and computer, provides a new type of compact multi-pin semiconductor package as large as a semiconductor chip mounted thereon, and accomplishes a semiconductor package having multi-function to minimize its mounting area on an electronic product, resulting in minimizing of the products.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.